1. Field of Invention
The present invention relates to a voltage regulator circuit, and more particularly to a low dropout voltage regulator.
2. Description of the Related Art
Low dropout (LDO) voltage regulators are commonly used in power management systems of PC motherboards, laptop computers, mobile phones, and many other products. Power management systems use LDO voltage regulators as local power supplies, where a clean output and a fast transient response are required. LDO voltage regulators enable power management systems to efficiently supply additional voltage levels that are smaller than the main supply voltage. For example, 5V power systems of many PC motherboards use LDO voltage regulators to supply local chipsets with a clean 3.3V signal.
Although LDO voltage regulators do not convert power very efficiently, they are inexpensive, small, and generate very little frequency interference. Furthermore, an LDO voltage regulator can provide a local circuit with a clean voltage that is unaffected by current fluctuations from other areas of the power system. LDO voltage regulators are widely used to supply power to local circuits when the power consumption of the local circuit is negligible with respect to the overall load of the power system.
An ideal LDO voltage regulator should provide a quick and precise DC response to load changes and input transients. Since LDO voltage regulators are widely used in mass-production of computers and mobile phones, for example, a simple design and a low fabrication cost of LDO regulators are also desirable.
A typical LDO voltage regulator includes a feedback-control loop coupled to a pass element. The feedback-control loop modulates a gate voltage of the pass element to control its impedance. Depending on the gate voltage, the pass element supplies different levels of current to an output section of the power supply. The modulation of the gate voltage is done in a manner such that the LDO voltage regulator outputs a steady DC voltage, regardless of loading conditions and input transients.
Referring to FIG. 1, a basic configuration of a conventional LDO voltage regulator is illustrated. The conventional LDO voltage regulator includes an unregulated DC input terminal VIN, an output pass transistor 10, a regulated DC output terminal VOUT, and an output module including a load resistance 20, an output capacitor 21 and a parasitic equivalent series resistance (ESR) 22. The conventional LDO voltage regulator further includes a voltage divider having a voltage-dividing node FB, a resistor 31, and a resistor 32. The conventional LDO voltage regulator further includes a feedback-control circuit including an error amplifier 40 and a reference voltage port REF. The output impedance of the error amplifier 40 is denoted as a resistor 41, which is connected from an output of the error amplifier 40 to a reference ground level. A gate of the output pass transistor 10 has a parasitic capacitance denoted as a capacitor 42, which is connected from the gate of the output pass transistor 10 to the reference ground level. The unregulated DC input terminal VIN is connected to a source of the output pass transistor 10. A drain of the output pass transistor 10 is connected to the regulated DC output terminal VOUT. The load resistance 20 and the output capacitor 21 are connected in parallel between the regulated DC output terminal VOUT and the reference ground level. The regulated DC output terminal VOUT is connected to the feedback-control circuit through the voltage divider. The resistor 31 and the resistor 32 are connected in series between the regulated DC output terminal VOUT and the reference ground level. The voltage-dividing node FB is located between the resistor 31 and the resistor 32. The voltage-dividing node FB is connected back to a positive input of the error amplifier 40. The reference voltage port REF is connected to a negative input of the error amplifier 40. An output of the error amplifier 40 is connected to the gate of the output pass transistor 10. Operation of this circuit is obvious to those skilled in the art.
One problem with the conventional LDO circuits described above is that they are prone to be unstable. The output module introduces a pole or a pole-zero pair to the feedback circuit. Unfortunately, the pole or the pole-zero pair is significantly sensitive to operating temperature, and possibly to other factors. If the load impedance varies by a specific amount, an unstable feedback loop may be incurred.
Another problem with the conventional LDO voltage regulators is that a transient response thereof is slow. The slow transient response is resulted from low bandwidth of the compensation feedback loop.
The conventional LDO voltage regulator is prone to unstable because the output impedance is various. Furthermore, performance thereof suffers from slow response. Therefore, an improved LDO voltage regulator with substantially faster transient response adapted to a variety of loads is needed.